VLSI architecture for hierarchical routing in dynamic route guidance systems

The board aim of this project is to device alternate strategies to improve the efficiency of the route computation process by making extensive use of the knowledge about the road network and exploiting the power of dedicated hardware architectures.

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Bibliographic Details
Main Author:	Jagadeesh, George Rosario
Other Authors:	Srikanthan, Thambipillai
Format:	Theses and Dissertations
Published:	2008
Subjects:	DRNTU::Engineering::Computer science and engineering::Computer applications::Physical sciences and engineering
Online Access:	http://hdl.handle.net/10356/2634
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Institution:	Nanyang Technological University

id	sg-ntu-dr.10356-2634
record_format	dspace
spelling	sg-ntu-dr.10356-26342023-03-04T00:32:41Z VLSI architecture for hierarchical routing in dynamic route guidance systems Jagadeesh, George Rosario Srikanthan, Thambipillai School of Computer Engineering DRNTU::Engineering::Computer science and engineering::Computer applications::Physical sciences and engineering The board aim of this project is to device alternate strategies to improve the efficiency of the route computation process by making extensive use of the knowledge about the road network and exploiting the power of dedicated hardware architectures. Master of Engineering (SCE) 2008-09-17T09:06:45Z 2008-09-17T09:06:45Z 2002 2002 Thesis http://hdl.handle.net/10356/2634 Nanyang Technological University application/pdf
institution	Nanyang Technological University
building	NTU Library
continent	Asia
country	Singapore Singapore
content_provider	NTU Library
collection	DR-NTU
topic	DRNTU::Engineering::Computer science and engineering::Computer applications::Physical sciences and engineering
spellingShingle	DRNTU::Engineering::Computer science and engineering::Computer applications::Physical sciences and engineering Jagadeesh, George Rosario VLSI architecture for hierarchical routing in dynamic route guidance systems
description	The board aim of this project is to device alternate strategies to improve the efficiency of the route computation process by making extensive use of the knowledge about the road network and exploiting the power of dedicated hardware architectures.
author2	Srikanthan, Thambipillai
author_facet	Srikanthan, Thambipillai Jagadeesh, George Rosario
format	Theses and Dissertations
author	Jagadeesh, George Rosario
author_sort	Jagadeesh, George Rosario
title	VLSI architecture for hierarchical routing in dynamic route guidance systems
title_short	VLSI architecture for hierarchical routing in dynamic route guidance systems
title_full	VLSI architecture for hierarchical routing in dynamic route guidance systems
title_fullStr	VLSI architecture for hierarchical routing in dynamic route guidance systems
title_full_unstemmed	VLSI architecture for hierarchical routing in dynamic route guidance systems
title_sort	vlsi architecture for hierarchical routing in dynamic route guidance systems
publishDate	2008
url	http://hdl.handle.net/10356/2634
_version_	1759855595483037696

VLSI architecture for hierarchical routing in dynamic route guidance systems

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