Language-specific RISC engine based on bi-polar building blocks

Reduced instruction set computers have made a significant impact on the development of high-speed microcomputer and have revolutionized the use of computers at all levels of society. This report traces the design and implementation of a RISC processor for a language specific (sub-set of C).

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Bibliographic Details
Main Author:	Chan, Choong Wah.
Other Authors:	School of Electrical and Electronic Engineering
Format:	Research Report
Published:	2008
Subjects:	DRNTU::Engineering::Electrical and electronic engineering::Computer hardware, software and systems
Online Access:	http://hdl.handle.net/10356/3023
Tags:	Add Tag No Tags, Be the first to tag this record!
Institution:	Nanyang Technological University

id	sg-ntu-dr.10356-3023
record_format	dspace
spelling	sg-ntu-dr.10356-30232023-03-04T03:23:42Z Language-specific RISC engine based on bi-polar building blocks Chan, Choong Wah. School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Computer hardware, software and systems Reduced instruction set computers have made a significant impact on the development of high-speed microcomputer and have revolutionized the use of computers at all levels of society. This report traces the design and implementation of a RISC processor for a language specific (sub-set of C). RP 27/86 2008-09-17T09:19:02Z 2008-09-17T09:19:02Z 1992 1992 Research Report http://hdl.handle.net/10356/3023 Nanyang Technological University application/pdf
institution	Nanyang Technological University
building	NTU Library
continent	Asia
country	Singapore Singapore
content_provider	NTU Library
collection	DR-NTU
topic	DRNTU::Engineering::Electrical and electronic engineering::Computer hardware, software and systems
spellingShingle	DRNTU::Engineering::Electrical and electronic engineering::Computer hardware, software and systems Chan, Choong Wah. Language-specific RISC engine based on bi-polar building blocks
description	Reduced instruction set computers have made a significant impact on the development of high-speed microcomputer and have revolutionized the use of computers at all levels of society. This report traces the design and implementation of a RISC processor for a language specific (sub-set of C).
author2	School of Electrical and Electronic Engineering
author_facet	School of Electrical and Electronic Engineering Chan, Choong Wah.
format	Research Report
author	Chan, Choong Wah.
author_sort	Chan, Choong Wah.
title	Language-specific RISC engine based on bi-polar building blocks
title_short	Language-specific RISC engine based on bi-polar building blocks
title_full	Language-specific RISC engine based on bi-polar building blocks
title_fullStr	Language-specific RISC engine based on bi-polar building blocks
title_full_unstemmed	Language-specific RISC engine based on bi-polar building blocks
title_sort	language-specific risc engine based on bi-polar building blocks
publishDate	2008
url	http://hdl.handle.net/10356/3023
_version_	1759856916780023808

Language-specific RISC engine based on bi-polar building blocks

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