Language-specific RISC engine based on bi-polar building blocks
Reduced instruction set computers have made a significant impact on the development of high-speed microcomputer and have revolutionized the use of computers at all levels of society. This report traces the design and implementation of a RISC processor for a language specific (sub-set of C).
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Main Author: | Chan, Choong Wah. |
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Other Authors: | School of Electrical and Electronic Engineering |
Format: | Research Report |
Published: |
2008
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Subjects: | |
Online Access: | http://hdl.handle.net/10356/3023 |
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Institution: | Nanyang Technological University |
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