Study on the layout of some commercial VLSI circuits
Project studies the critical portions of the layout of some VLSI circuits to enhance our up-to-date techniques of circuit design. Memory chips are selected as the targets of study because they have finer and denser layout patterns than most custom chips.
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2008
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Online Access: | http://hdl.handle.net/10356/3025 |
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sg-ntu-dr.10356-30252023-03-04T03:20:50Z Study on the layout of some commercial VLSI circuits Liu, Po Ching. Chin, Edward Hsi Ling. School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits Project studies the critical portions of the layout of some VLSI circuits to enhance our up-to-date techniques of circuit design. Memory chips are selected as the targets of study because they have finer and denser layout patterns than most custom chips. RP 15/86 2008-09-17T09:19:05Z 2008-09-17T09:19:05Z 1986 1986 Research Report http://hdl.handle.net/10356/3025 Nanyang Technological University application/pdf |
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DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits Liu, Po Ching. Chin, Edward Hsi Ling. Study on the layout of some commercial VLSI circuits |
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Project studies the critical portions of the layout of some VLSI circuits to enhance our up-to-date techniques of circuit design. Memory chips are selected as the targets of study because they have finer and denser layout patterns than most custom chips. |
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School of Electrical and Electronic Engineering |
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School of Electrical and Electronic Engineering Liu, Po Ching. Chin, Edward Hsi Ling. |
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Research Report |
author |
Liu, Po Ching. Chin, Edward Hsi Ling. |
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Liu, Po Ching. |
title |
Study on the layout of some commercial VLSI circuits |
title_short |
Study on the layout of some commercial VLSI circuits |
title_full |
Study on the layout of some commercial VLSI circuits |
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Study on the layout of some commercial VLSI circuits |
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Study on the layout of some commercial VLSI circuits |
title_sort |
study on the layout of some commercial vlsi circuits |
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2008 |
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http://hdl.handle.net/10356/3025 |
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1759854368533774336 |