Macromodelling of analogue circuits using VHDL-AMS

• 主要作者: Su, Latt Mon.
• 其他作者: Lam, Yvonne Ying Hung
• 格式: Theses and Dissertations
• 出版: 2008
• 主題: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
• 在線閱讀: http://hdl.handle.net/10356/3298

The purpose of this project is to implement the top down design system by using VHDL-AMS. VHDL-AMS, an analogue hardware description language and an extension to Very High-Speed Integrated Circuits (VHSIC) Hardware Description Language (VHDL), is capable of modelling analogue models by using additio...