Design of a low noise CMOS Op-Amp with high PSRR

An integrated circuit design for low supply voltage applications and high quality performance becomes a challenging task in recent years. This report presents a low voltage, low power, low noise and high power supply rejection ratio (PSRR) operational amplifier to drive a resistive load of 10k Ohm i...

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Main Author: The, Yen Ju.
Other Authors: Siek, Liter
Format: Theses and Dissertations
Published: 2008
Subjects:
Online Access:http://hdl.handle.net/10356/3585
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Institution: Nanyang Technological University
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spelling sg-ntu-dr.10356-35852023-07-04T16:37:27Z Design of a low noise CMOS Op-Amp with high PSRR The, Yen Ju. Siek, Liter School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits An integrated circuit design for low supply voltage applications and high quality performance becomes a challenging task in recent years. This report presents a low voltage, low power, low noise and high power supply rejection ratio (PSRR) operational amplifier to drive a resistive load of 10k Ohm in parallel with a capacitive loadof70pF. Master of Science (Integrated Circuit Design) 2008-09-17T09:32:58Z 2008-09-17T09:32:58Z 2005 2005 Thesis http://hdl.handle.net/10356/3585 Nanyang Technological University application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
topic DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
spellingShingle DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
The, Yen Ju.
Design of a low noise CMOS Op-Amp with high PSRR
description An integrated circuit design for low supply voltage applications and high quality performance becomes a challenging task in recent years. This report presents a low voltage, low power, low noise and high power supply rejection ratio (PSRR) operational amplifier to drive a resistive load of 10k Ohm in parallel with a capacitive loadof70pF.
author2 Siek, Liter
author_facet Siek, Liter
The, Yen Ju.
format Theses and Dissertations
author The, Yen Ju.
author_sort The, Yen Ju.
title Design of a low noise CMOS Op-Amp with high PSRR
title_short Design of a low noise CMOS Op-Amp with high PSRR
title_full Design of a low noise CMOS Op-Amp with high PSRR
title_fullStr Design of a low noise CMOS Op-Amp with high PSRR
title_full_unstemmed Design of a low noise CMOS Op-Amp with high PSRR
title_sort design of a low noise cmos op-amp with high psrr
publishDate 2008
url http://hdl.handle.net/10356/3585
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