Study of power supply design for high speed circuit

• Main Author: Toh, Tze Yan.
• Other Authors: See Kye Yak
• Format: Final Year Project
• Language: English
• Published: 2010
• Subjects: DRNTU::Engineering::Electrical and electronic engineering::Power electronics
• Online Access: http://hdl.handle.net/10356/40277
• Institution: Nanyang Technological University

Power noise is one of the key signal integrity problems. Unlike the design of signal paths, where the design rules in one product can often be applied to other products of similar bandwidth, the goal and constraints of designing power distribution network (PDN) can vary widely from product to product so design features of one product should not be applied to another product blindly. The primary purpose of PDN is to keep voltage constant across the pads of integrating circuits (ICs). The design of PDN also minimizes ground bounce and EMI problems. The main focus in this report is to understand the concept behind the design of a power distribution network and how each component play a role in ensuring power integrity (PI). An in-depth literature review on the various key components affecting PDN is first carried out. Next the identification of the design goal so that appropriate techniques can be applied to meet this criterion. Two major techniques are studied, including the using of decoupling where global utilizing large capacitance (4.7 µF) satisfy frequency below 30 MHz while local decoupling utilizing smaller capacitance (0.01 – 1 µF) are able to achieve up to 700 MHz. For higher frequency consideration, reducing the plane separation from 63 mils to 40 mils in PCB layer stack-up provides additional 5 – 10 dB impedance reduction.