PCB layout design consideration for high speed digital application

As technology advanced, operation speed of the systems increases, edge rate of the signals has entered the sub-nanoseconds region. The conversion rate of the ADC is also increasing with the trend. Being one of the critical components bridging the real world analog signal and the digital signal, i...

Full description

Saved in:
Bibliographic Details
Main Author: Ang, See Theng
Other Authors: See Kye Yak
Format: Final Year Project
Language:English
Published: 2010
Subjects:
Online Access:http://hdl.handle.net/10356/40310
Tags: Add Tag
No Tags, Be the first to tag this record!
Institution: Nanyang Technological University
Language: English
id sg-ntu-dr.10356-40310
record_format dspace
spelling sg-ntu-dr.10356-403102023-07-07T15:44:09Z PCB layout design consideration for high speed digital application Ang, See Theng See Kye Yak School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits As technology advanced, operation speed of the systems increases, edge rate of the signals has entered the sub-nanoseconds region. The conversion rate of the ADC is also increasing with the trend. Being one of the critical components bridging the real world analog signal and the digital signal, it is therefore important to study the design consideration particularly the PCB layout design techniques so as to ensure signal integrity and optimized circuit overall performance. A literature review is done to understand high speed ADC which includes the different ADC architectures, critical specification parameters to quantify the performance of the ADC. Hands on understanding of a typical operational highspeed ADC prototype was carried out to understand its operation while observing the critical layout design technique utilized such as termination, crosstalk, vias, trace bends and trace delay design for high speed ADC circuitry but not only limited to ADC. From my project, simulation results shows that in PCB design layout for high speed digital system, it is important to minimize signal trace impedance variations by employing microstrip line configuration, minimum via diameter and trace terminations. Crosstalk can be minimized by 50% with double the trace separation between the adjacent signal traces. And optimized signal delay with optimum impedance variation and emissions radiated using serpentine delay of 45-degree bends, segment spacing of three to five times the distance of the signal trace from the reference plane and with cluster of five bends or less. Bachelor of Engineering 2010-06-14T07:32:33Z 2010-06-14T07:32:33Z 2010 2010 Final Year Project (FYP) http://hdl.handle.net/10356/40310 en Nanyang Technological University 59 p. application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
spellingShingle DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Ang, See Theng
PCB layout design consideration for high speed digital application
description As technology advanced, operation speed of the systems increases, edge rate of the signals has entered the sub-nanoseconds region. The conversion rate of the ADC is also increasing with the trend. Being one of the critical components bridging the real world analog signal and the digital signal, it is therefore important to study the design consideration particularly the PCB layout design techniques so as to ensure signal integrity and optimized circuit overall performance. A literature review is done to understand high speed ADC which includes the different ADC architectures, critical specification parameters to quantify the performance of the ADC. Hands on understanding of a typical operational highspeed ADC prototype was carried out to understand its operation while observing the critical layout design technique utilized such as termination, crosstalk, vias, trace bends and trace delay design for high speed ADC circuitry but not only limited to ADC. From my project, simulation results shows that in PCB design layout for high speed digital system, it is important to minimize signal trace impedance variations by employing microstrip line configuration, minimum via diameter and trace terminations. Crosstalk can be minimized by 50% with double the trace separation between the adjacent signal traces. And optimized signal delay with optimum impedance variation and emissions radiated using serpentine delay of 45-degree bends, segment spacing of three to five times the distance of the signal trace from the reference plane and with cluster of five bends or less.
author2 See Kye Yak
author_facet See Kye Yak
Ang, See Theng
format Final Year Project
author Ang, See Theng
author_sort Ang, See Theng
title PCB layout design consideration for high speed digital application
title_short PCB layout design consideration for high speed digital application
title_full PCB layout design consideration for high speed digital application
title_fullStr PCB layout design consideration for high speed digital application
title_full_unstemmed PCB layout design consideration for high speed digital application
title_sort pcb layout design consideration for high speed digital application
publishDate 2010
url http://hdl.handle.net/10356/40310
_version_ 1772826321916788736