Asynchronous pipelined macrocell design for high speed digital applications

• Main Author: Sin, Tze Yee.
• Other Authors: Wong, Eddie Moon Chung
• Format: Theses and Dissertations
• Published: 2008
• Subjects: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
• Online Access: http://hdl.handle.net/10356/3265
• Institution: Nanyang Technological University

Since the beginning of the digital era, synchronous methodology has overtaken digital system design for its simplicity in implementation. The synchronous global clock, however, may become a major problem as technology scales. This rekindles the interest of asynchronous design methodology, which has...