Design methodologies for robust and low-overhead asynchronous quasi-delay-insensitive digital systems

In the past decades of electronic circuit designs, the synchronous-logic (sync) is the main de-facto design approach for digital systems. This is largely due to its synchronization to a global clock signal (or its variants thereof) which simplifies the data transfer. Nevertheless, designing digital...

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Bibliographic Details
Main Author: Zhou, Rong
Other Authors: Gwee Bah Hwee
Format: Theses and Dissertations
Language:English
Published: 2015
Subjects:
Online Access:https://hdl.handle.net/10356/65411
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Institution: Nanyang Technological University
Language: English