Design of the low-voltage CMOS analog multiplier
Analog Multiplier is an electronic device that performs linear multiplication of two continual input signals. It found its extensive uses in analog signal processing. In this report, different architectures of multipliers reported are discussed. Advantages and disadvantages of each topology were stu...
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| 格式: | Final Year Project |
| 語言: | English |
| 出版: |
2010
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| 在線閱讀: | http://hdl.handle.net/10356/40789 |
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| 機構: | Nanyang Technological University |
| 語言: | English |