An LDO with high drive and fast response

• Main Author: Kwantono, Hendra.
• Other Authors: Chan Pak Kwong
• Format: Final Year Project
• Language: English
• Published: 2010
• Subjects: DRNTU::Engineering::Electrical and electronic engineering::Power electronics
• Online Access: http://hdl.handle.net/10356/40846
• Institution: Nanyang Technological University

In this project two linear regulators based on a new topology is designed. This topology allows a linear regulator to have a fast settling time and Power-Supply Ripple Rejection (PSRR) of 40dB up to 1MHz while consuming current less than 26μA. The two regulators, High Dropout Regulator (HDO) and Low Dropout Regulator (LDO), provide an output of 1.8V using 1.2V reference from 3.3V supply and 2V supply while capable of driving maximum load of 1A and 100mA load respectively. A low-voltage low-power high-PSRR bandgap reference circuit has also been designed to provide the 1.2V voltage reference with temperature coefficient of 52ppm/⁰C to the regulator. The bandgap reference circuit can operate at supply voltage as low as 2V while consuming current not more than 1μA.