Top-down design verification of subranging pipelined analog-to-digital converter
High-speed high resolution analog-to-digital converter (ADC) is the key design blocks in mixed-signal chip design since the ADC is an interface between digital signal processing systems and the analog world. With the rapid advancement of CMOS fabrication technology, more and more signal-processing f...
Saved in:
Main Author: | Wang, Jin Ling |
---|---|
Other Authors: | Siek Liter |
Format: | Theses and Dissertations |
Language: | English |
Published: |
2010
|
Subjects: | |
Online Access: | https://hdl.handle.net/10356/40888 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | Nanyang Technological University |
Language: | English |
Similar Items
-
High-speed CMOS pipelined subranging ADC
by: Fan, Xianping
Published: (2010) -
Design and implementation of sigma delta analog-to-digital converter
by: Ong, Chee Kian.
Published: (2009) -
8-bit asynchronous dynamic reference analog-to-digital converter design
by: Adhika, Joseph Taruna
Published: (2020) -
Low power digital type analog-to-digital converter
by: Ng, Richard Wee Tar
Published: (2012) -
High resolution analog to digital converter
by: Siek, Liter.
Published: (2008)