Design of high performance, low power latches and flip-flops

• 主要作者: Shridhar Mubaraq Mishra.
• 其他作者: Yeo Kiat Seng
• 格式: Theses and Dissertations
• 語言: English
• 出版: 2011
• 主題: DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
• 在線閱讀: http://hdl.handle.net/10356/42657

With the advent of hand-held computing devices that require functionality rivaling the desktop, Low Power, High Performance systems have become the norm rather than the exception. The clocking network with its 20-40% contribution to the overall power dissipation is becoming a major obstacle in imp...