Design of high performance CMOS latches and flip-flops

• المؤلف الرئيسي: Tan, Teck Heng.
• مؤلفون آخرون: Yeo, Kiat Seng
• التنسيق: Theses and Dissertations
• منشور في: 2008
• الموضوعات: DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
• الوصول للمادة أونلاين: http://hdl.handle.net/10356/3390

Recommend ways to implement the various Double Edge Triggered Flip-Flop (DETFF) so that it can operate at the highest possible clock frequency, low enough operating nominal voltage and less power consumed by exploring various design circuit topologies and coming out with the best one with the curren...