Design of high performance CMOS latches and flip-flops

• Main Author: Tan, Teck Heng.
• Other Authors: Yeo, Kiat Seng
• Format: Theses and Dissertations
• Published: 2008
• Subjects: DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
• Online Access: http://hdl.handle.net/10356/3390
• Institution: Nanyang Technological University

Recommend ways to implement the various Double Edge Triggered Flip-Flop (DETFF) so that it can operate at the highest possible clock frequency, low enough operating nominal voltage and less power consumed by exploring various design circuit topologies and coming out with the best one with the curren...