VLSI implementation of a parser for MPEG-2 systems program stream

This report presents the VLSI design and implementation of a Parser for Program Stream of MPEG2 System Layer. The MPEG2 Program Stream Syntax, the Parser architecture, HDL implementation, simulation, synthesis and design timing analysis are discussed in detail.

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書目詳細資料
主要作者: Ashwin Pai Ballambettu.
其他作者: Ho, Duan Juat
格式: Theses and Dissertations
出版: 2008
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在線閱讀:http://hdl.handle.net/10356/4279
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