Implement a USB interface in Xilinx FPGA/CPLD

• Main Author: Huang, Yun.
• Other Authors: Jong Ching Chuen
• Format: Final Year Project
• Language: English
• Published: 2011
• Subjects: DRNTU::Engineering::Electrical and electronic engineering::Computer hardware, software and systems
• Online Access: http://hdl.handle.net/10356/42883
• Institution: Nanyang Technological University

The Universal Serial Bus (USB) is one of the most commonly used PC peripheral interfaces due to its easy-to-use features and its availability with every PC and compatibility with all the operating systems. The Field Programmable Gate Array (FPGA) is used widely in today’s embedded system design due to its powerful signal processing capability. In this project, the Cypress EZ-USB FX2LPTM USB controller is used to develop an FPGA-based USB peripheral. A Spartan 3A FPGA is acting as an external master in order for the USB controller to work in Slave FIFO mode. This configuration can be used to transfer high speed data between a PC and a low-level application, such as a Variable Gain Amplifier in this work, which has no intelligence to communicate with the PC directly. It can also be upgraded easily by programming the FPGA to work in most of the data transfer applications. The report details the design, implementation and testing of the embedded software in the Cypress USB controller, the controller and FIFO in FPGA and the software GUI on the PC.