Low-voltage, low-power CMOS arithmetic circuits for energy efficient VLSI applications

We present in this thesis several algorithms and designs, and their IC implementation of low-voltage, low-power CMOS arithmetic circuits for energy efficient VLSI applications. The design methodologies span from circuit level, architecture level to algorithm level.

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Bibliographic Details
Main Author: Gu, Jiangmin
Other Authors: Chang Chip Hong
Format: Theses and Dissertations
Published: 2008
Subjects:
Online Access:https://hdl.handle.net/10356/4315
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Institution: Nanyang Technological University
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