Efficient architecture for MPEG-4 binary shape decoder

Efficient architecture for MPEG-4 binary shape decoder

The objective of this project is to design an efficient architecture for MPEG-4 binary shape decoder. The efficiency if the architecture is investigated in terms of speed and area. Power minimization is also taken into consideration.

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Bibliographic Details
Main Author: Jagannatharaja Thinakaran, J. T.
Other Authors: Ho, Duan Juat
Format: Theses and Dissertations
Published: 2008
Subjects:
DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Online Access:http://hdl.handle.net/10356/4467
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Institution: Nanyang Technological University
Description
Summary:The objective of this project is to design an efficient architecture for MPEG-4 binary shape decoder. The efficiency if the architecture is investigated in terms of speed and area. Power minimization is also taken into consideration.

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