Sub-threshold SRAM cell design for ultra low-power applications

With the continuous development of the technology nowadays, the application of domains of memory components such as Static Random Access Memory (SRAM) have become increasingly broader, so are the demands for the SRAM. In many situations, the power consumption has been the design aspect that is of ut...

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Main Author: Lei, Gang.
Other Authors: Kong Zhi Hui
Format: Final Year Project
Language:English
Published: 2011
Subjects:
Online Access:http://hdl.handle.net/10356/45006
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Institution: Nanyang Technological University
Language: English
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spelling sg-ntu-dr.10356-450062023-07-07T17:18:29Z Sub-threshold SRAM cell design for ultra low-power applications Lei, Gang. Kong Zhi Hui School of Electrical and Electronic Engineering Centre for Integrated Circuits and Systems DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits With the continuous development of the technology nowadays, the application of domains of memory components such as Static Random Access Memory (SRAM) have become increasingly broader, so are the demands for the SRAM. In many situations, the power consumption has been the design aspect that is of utmost necessity and concern by the consumers. Under this circumstance, one potential solution is to efficiently design the SRAM memory cell so that it is able to operate in the sub-threshold region, which could significantly decrease the power consumption. Although there are many SRAM memory cells designed for the sub-threshlod region and they have very good performance with the previous CMOS technology, in terms of 65 nm technology today the performance of these SRAM memory cells is totally different with the developments of CMOS technology and scale down of CMOS channel width. In this final year project, two novelly designed memory cells are proposed for better performance in the sub-threshold region based on a 65 nm technology from United Microelectronics Corporation (UMC). Their performance is compared with the existing memory cells to evaluate that they can operate very well in the sub-threshold region and they can efficiently decrease the power consumption without the increase of delay. Bachelor of Engineering 2011-06-08T03:14:32Z 2011-06-08T03:14:32Z 2011 2011 Final Year Project (FYP) http://hdl.handle.net/10356/45006 en Nanyang Technological University 59 p. application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
spellingShingle DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
Lei, Gang.
Sub-threshold SRAM cell design for ultra low-power applications
description With the continuous development of the technology nowadays, the application of domains of memory components such as Static Random Access Memory (SRAM) have become increasingly broader, so are the demands for the SRAM. In many situations, the power consumption has been the design aspect that is of utmost necessity and concern by the consumers. Under this circumstance, one potential solution is to efficiently design the SRAM memory cell so that it is able to operate in the sub-threshold region, which could significantly decrease the power consumption. Although there are many SRAM memory cells designed for the sub-threshlod region and they have very good performance with the previous CMOS technology, in terms of 65 nm technology today the performance of these SRAM memory cells is totally different with the developments of CMOS technology and scale down of CMOS channel width. In this final year project, two novelly designed memory cells are proposed for better performance in the sub-threshold region based on a 65 nm technology from United Microelectronics Corporation (UMC). Their performance is compared with the existing memory cells to evaluate that they can operate very well in the sub-threshold region and they can efficiently decrease the power consumption without the increase of delay.
author2 Kong Zhi Hui
author_facet Kong Zhi Hui
Lei, Gang.
format Final Year Project
author Lei, Gang.
author_sort Lei, Gang.
title Sub-threshold SRAM cell design for ultra low-power applications
title_short Sub-threshold SRAM cell design for ultra low-power applications
title_full Sub-threshold SRAM cell design for ultra low-power applications
title_fullStr Sub-threshold SRAM cell design for ultra low-power applications
title_full_unstemmed Sub-threshold SRAM cell design for ultra low-power applications
title_sort sub-threshold sram cell design for ultra low-power applications
publishDate 2011
url http://hdl.handle.net/10356/45006
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