Design and analysis of low-power, variation-tolerant match-line sense amplifiers for large capacity content addressable memories (CAMs) in 65 nm CMOS process

• المؤلف الرئيسي: Tan, Xiao Liang.
• مؤلفون آخرون: Yeo Kiat Seng
• التنسيق: Final Year Project
• اللغة: English
• منشور في: 2011
• الموضوعات: DRNTU::Engineering::Electrical and electronic engineering::Power electronics
• الوصول للمادة أونلاين: http://hdl.handle.net/10356/45740
• المؤسسة: Nanyang Technological University

Content Addressable Memory (CAM) is extensively used in many high speed data searching applications due to its high speed and single clock cycle throughput characteristics. However, this comes at a cost of high power consumption mainly due to the match line sense amplifier. Therefore, a lot of works...