Design and analysis of low-power, variation-tolerant match-line sense amplifiers for large capacity content addressable memories (CAMs) in 65 nm CMOS process

Design and analysis of low-power, variation-tolerant match-line sense amplifiers for large capacity content addressable memories (CAMs) in 65 nm CMOS process

Content Addressable Memory (CAM) is extensively used in many high speed data searching applications due to its high speed and single clock cycle throughput characteristics. However, this comes at a cost of high power consumption mainly due to the match line sense amplifier. Therefore, a lot of works...

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書目詳細資料
主要作者:	Tan, Xiao Liang.
其他作者:	Yeo Kiat Seng
格式:	Final Year Project
語言:	English
出版:	2011
主題:	DRNTU::Engineering::Electrical and electronic engineering::Power electronics
在線閱讀:	http://hdl.handle.net/10356/45740
標簽:	添加標簽沒有標簽, 成為第一個標記此記錄!

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