2D & 3D TCAD-based compact modeling for advanced CMOS transistors

• Main Author: Poh, Kay Dee.
• Other Authors: Zhou Xing
• Format: Final Year Project
• Language: English
• Published: 2011
• Subjects: DRNTU::Engineering::Electrical and electronic engineering::Power electronics
• Online Access: http://hdl.handle.net/10356/45991
• Institution: Nanyang Technological University

This proposed project aim to use technology computer-aided design (TCAD) in aiding new semiconductor technology development and deep sub-micron transistor design and optimisation. This research will focus on develop a strategy to minimize the number of 2D and 3D simulations for catching the effect of the process variable on the device target. This goal can be achieved by TCAD simulation tools to construct a huge database in a form easily accessible to the user. The rationale behind this project is that, by using the TCAD, wafer process flow with different design of experiment (DOE) can be simulated through Taurus Workbench (TWB). The obtained device targets can be analyzed and plotted as different IV curves. Furthermore, these devices target will be assigned to a matrix array. Each device target in the database can be related to a number of variables and each target-variable dependency represents a particular DOE. These device targets will be interpolated and form a huge target-variable database. Hence, this would help to minimize the number of simulations. The whole work is based upon simulation and interpolation. Different combinations of process variables and device targets will be interpolated by using matrix laboratory (MATLAB), a numerical computing environment and fourth-generation programming language. The result of obtained from the interpolation will be compared with the result from actual simulation to verify the result accuracy. The more the knwon data points for interpolation, the more accurate for the interpolated result. Meanwhile, the database will be increased with the more data points used.