Electrical properties of neodymium oxide/titanium dioxide and neodymium oxide/gadolinium silicate dielectric gate stack on silicon substrate

• Main Author: Lee, Vivian Sing Zhi.
• Other Authors: Alfred Tok Iing Yoong
• Format: Final Year Project
• Language: English
• Published: 2012
• Subjects: DRNTU::Engineering::Materials::Microelectronics and semiconductor materials
• Online Access: http://hdl.handle.net/10356/48413
• Institution: Nanyang Technological University

The problem with using single layer of high dielectric constant materials is the interfacial layer growth during thermal process of fabrication. The purpose of studying bilayer dielectric gate stack is because single layer can lead to interfacial layer growth during thermal process of fabrication. Neodymium oxide will be deposited on Silicon substrate first by Pulsed laser deposition. Gadolinium silicate and Titanium dioxide will then be deposited on top of Neodymium oxide separately by Atomic layer deposition. Two different combinations dielectric gate stack are then formed: Neodymium oxide/ Titanium dioxide (Sample A) and Neodymium oxide/ Gadolinium silicate (Sample B). The thickness of each dielectric gate stack is approximately 6nm. Crystal structure of Neodymium oxide and Titanium dioxide film crystallize upon annealing, while Gadolinium silicate remains amorphous. The RMS for Sample A is approximately 0.666nm and Sample B is approximately 0.864nm. The dielectric constant of Sample A is approximately 11.9 and Sample B is 8.68. The leakage current density at -1V for Sample A is approximately 1.6x10-1 A/cm2.and Sample B is approximately 1.6x10-2 A/cm2. Result shows that, Sample A offers higher dielectric constant but higher leakage current density due to the crystallization of the Titanium dioxide film during annealing. While Sample B offers lower leakage current density but lower dielectric constant due to the silicate formation as silyl-amide based precursor was used.