Design and implementation of a digital system of elementary function computation on FPGA device
The integrated Add-Table lookup-Add (iATA) is a memory efficient algorithm for computing elementary functions. In the iATA method, an elementary function is implemented in tables and the outputs of the tables are then summed to obtain the value of the function. Xilinx 7-Series FPGA is used to implem...
Saved in:
| Main Author: | |
|---|---|
| Other Authors: | |
| Format: | Final Year Project |
| Language: | English |
| Published: |
2012
|
| Subjects: | |
| Online Access: | http://hdl.handle.net/10356/49575 |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| Institution: | Nanyang Technological University |
| Language: | English |
| id |
sg-ntu-dr.10356-49575 |
|---|---|
| record_format |
dspace |
| spelling |
sg-ntu-dr.10356-495752023-07-07T15:58:03Z Design and implementation of a digital system of elementary function computation on FPGA device Wu, Yujie. Jong Ching Chuen School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Electronic systems The integrated Add-Table lookup-Add (iATA) is a memory efficient algorithm for computing elementary functions. In the iATA method, an elementary function is implemented in tables and the outputs of the tables are then summed to obtain the value of the function. Xilinx 7-Series FPGA is used to implement the iATA system. Bachelor of Engineering 2012-05-22T02:35:27Z 2012-05-22T02:35:27Z 2012 2012 Final Year Project (FYP) http://hdl.handle.net/10356/49575 en Nanyang Technological University 55 p. application/pdf |
| institution |
Nanyang Technological University |
| building |
NTU Library |
| continent |
Asia |
| country |
Singapore Singapore |
| content_provider |
NTU Library |
| collection |
DR-NTU |
| language |
English |
| topic |
DRNTU::Engineering::Electrical and electronic engineering::Electronic systems |
| spellingShingle |
DRNTU::Engineering::Electrical and electronic engineering::Electronic systems Wu, Yujie. Design and implementation of a digital system of elementary function computation on FPGA device |
| description |
The integrated Add-Table lookup-Add (iATA) is a memory efficient algorithm for computing elementary functions. In the iATA method, an elementary function is implemented in tables and the outputs of the tables are then summed to obtain the value of the function. Xilinx 7-Series FPGA is used to implement the iATA system. |
| author2 |
Jong Ching Chuen |
| author_facet |
Jong Ching Chuen Wu, Yujie. |
| format |
Final Year Project |
| author |
Wu, Yujie. |
| author_sort |
Wu, Yujie. |
| title |
Design and implementation of a digital system of elementary function computation on FPGA device |
| title_short |
Design and implementation of a digital system of elementary function computation on FPGA device |
| title_full |
Design and implementation of a digital system of elementary function computation on FPGA device |
| title_fullStr |
Design and implementation of a digital system of elementary function computation on FPGA device |
| title_full_unstemmed |
Design and implementation of a digital system of elementary function computation on FPGA device |
| title_sort |
design and implementation of a digital system of elementary function computation on fpga device |
| publishDate |
2012 |
| url |
http://hdl.handle.net/10356/49575 |
| _version_ |
1772828182710321152 |