Design and implementation of a digital system of elementary function computation on FPGA device

The integrated Add-Table lookup-Add (iATA) is a memory efficient algorithm for computing elementary functions. In the iATA method, an elementary function is implemented in tables and the outputs of the tables are then summed to obtain the value of the function. Xilinx 7-Series FPGA is used to implem...

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書目詳細資料
主要作者: Wu, Yujie.
其他作者: Jong Ching Chuen
格式: Final Year Project
語言:English
出版: 2012
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在線閱讀:http://hdl.handle.net/10356/49575
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