FPGA implementation of a speech coder

• Main Author: Tay, Zar Myint.
• Other Authors: Ho Duan Juat
• Format: Final Year Project
• Language: English
• Published: 2010
• Subjects: DRNTU::Engineering::Electrical and electronic engineering::Electronic systems::Signal processing
• Online Access: http://hdl.handle.net/10356/40567
• Institution: Nanyang Technological University

In this project, one of the speech compression methods, a LPC 10 decoder was designed by using VHDL. In the designed LPC decoder, two different types of speech production model were designed and used to compare their performances. The first model used two adders, two multipliers and one substractor...