FPGA implementation of a speech coder

• المؤلف الرئيسي: Tay, Zar Myint.
• مؤلفون آخرون: Ho Duan Juat
• التنسيق: Final Year Project
• اللغة: English
• منشور في: 2010
• الموضوعات: DRNTU::Engineering::Electrical and electronic engineering::Electronic systems::Signal processing
• الوصول للمادة أونلاين: http://hdl.handle.net/10356/40567

In this project, one of the speech compression methods, a LPC 10 decoder was designed by using VHDL. In the designed LPC decoder, two different types of speech production model were designed and used to compare their performances. The first model used two adders, two multipliers and one substractor...