Design and ASIC implementation of binary-to-residue converter

This project involves the design and synthesis of improved binary-to-residue converter, also known as the forward converter, which converts an integer number from Binary Number System (BNS) representation into Residue Number System (RNS) representation. Improvement to the design were made in...

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Main Author: Kor, Tianyuan.
Other Authors: Chang Chip Hong
Format: Final Year Project
Language:English
Published: 2012
Subjects:
Online Access:http://hdl.handle.net/10356/49949
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Institution: Nanyang Technological University
Language: English
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spelling sg-ntu-dr.10356-499492023-07-07T16:25:39Z Design and ASIC implementation of binary-to-residue converter Kor, Tianyuan. Chang Chip Hong School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits This project involves the design and synthesis of improved binary-to-residue converter, also known as the forward converter, which converts an integer number from Binary Number System (BNS) representation into Residue Number System (RNS) representation. Improvement to the design were made in the carry free additional stage, also known as the column compression stage or reduction stage, whereby counters are incorporated to perform the preliminary partial product bit accumulation before summation using adders. Additive inverse technique was also used in this stage. The proposed forward converter had implemented a Look-Up Table to facilitate compression by converting the higher partial bit product to residue value. Both residue and lower bit partial bit product will then pass thru a proposed modulus adder. This report discusses the entire application-specific integrated circuit implementation process, from RTL coding and function simulations of the proposed architecture to synthesis and timing verification of the design. Bachelor of Engineering 2012-05-25T07:59:26Z 2012-05-25T07:59:26Z 2012 2012 Final Year Project (FYP) http://hdl.handle.net/10356/49949 en Nanyang Technological University 49 p. application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
spellingShingle DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
Kor, Tianyuan.
Design and ASIC implementation of binary-to-residue converter
description This project involves the design and synthesis of improved binary-to-residue converter, also known as the forward converter, which converts an integer number from Binary Number System (BNS) representation into Residue Number System (RNS) representation. Improvement to the design were made in the carry free additional stage, also known as the column compression stage or reduction stage, whereby counters are incorporated to perform the preliminary partial product bit accumulation before summation using adders. Additive inverse technique was also used in this stage. The proposed forward converter had implemented a Look-Up Table to facilitate compression by converting the higher partial bit product to residue value. Both residue and lower bit partial bit product will then pass thru a proposed modulus adder. This report discusses the entire application-specific integrated circuit implementation process, from RTL coding and function simulations of the proposed architecture to synthesis and timing verification of the design.
author2 Chang Chip Hong
author_facet Chang Chip Hong
Kor, Tianyuan.
format Final Year Project
author Kor, Tianyuan.
author_sort Kor, Tianyuan.
title Design and ASIC implementation of binary-to-residue converter
title_short Design and ASIC implementation of binary-to-residue converter
title_full Design and ASIC implementation of binary-to-residue converter
title_fullStr Design and ASIC implementation of binary-to-residue converter
title_full_unstemmed Design and ASIC implementation of binary-to-residue converter
title_sort design and asic implementation of binary-to-residue converter
publishDate 2012
url http://hdl.handle.net/10356/49949
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