Analysis and design of on-chip antenna and its switch in 65nm CMOS
This thesis can be divided into four parts. In the first part of the work, the simplified model of the chip is presented. The multiple silicon-oxide layers and passivation layers are simplified. The simplified chip model can be simulated in common PC by the 3D EM simulator Ansys HFSS. Besides, the l...
Saved in:
Main Author: | Deng, Tianwei |
---|---|
Other Authors: | Zhang Yue Ping |
Format: | Theses and Dissertations |
Language: | English |
Published: |
2013
|
Subjects: | |
Online Access: | http://hdl.handle.net/10356/52078 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | Nanyang Technological University |
Language: | English |
Similar Items
-
Miniaturized 3-bit phase shifter for 60 GHz phased-array in 65 nm CMOS technology
by: Meng, Fanyi, et al.
Published: (2013) -
A 4 GHz 60 dB variable gain amplifier with tunable DC offset cancellation in 65 nm CMOS
by: Kumar, Thangarasu Bharatha, et al.
Published: (2015) -
A −78dBm sensitivity super-regenerative receiver at 96 GHz with quench-controlled metamaterial oscillator in 65nm CMOS
by: Shang, Yang, et al.
Published: (2013) -
Design a CMOS transmit-receive-antenna switch for 5.2GHz applications
by: Shi, Lu.
Published: (2008) -
Design of differentially-driven chip antenna
by: Tan, Heng Chuan.
Published: (2011)