Design a power-efficient asyncrhonous logic quasi-delay-insensitive network-on-chip for multi-core processor

• Main Author: Lim, Eng Soon.
• Other Authors: Gwee Bah Hwee
• Format: Final Year Project
• Language: English
• Published: 2013
• Subjects: DRNTU::Engineering
• Online Access: http://hdl.handle.net/10356/53110
• Institution: Nanyang Technological University

This report pertains to the design of a power-efficient asynchronous logic quasi-delay-insensitive (QDI) Network-on-Chip (NoC) for multi-core processor. To achieve the low power requirement, the proposed NoC is designed to operate in the sub-threshold region. However, operating in the deep sub-thres...