Efficient polynomial evaluation algorithm and implementation on FPGA
In this thesis, an optimized polynomial evaluation algorithm is presented. Compared to Horner's Rule which has the least number of computation steps but longest latency, or parallel evaluation methods like Estrin's method which are fast but with large hardware overhead, the proposed algori...
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| 格式: | Theses and Dissertations |
| 語言: | English |
| 出版: |
2013
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| 主題: | |
| 在線閱讀: | https://hdl.handle.net/10356/54869 |
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