Efficient architectures for computation of binary logarithm

Logarithmic Number System (LNS) is often used in digital signal processing to simplify complex arithmetic operations. LNS requires data to be converted into the logarithmic domain, i.e., logarithmic conversion. The thesis studies the VLSI architectures for logarithmic conversion. The existing Mitche...

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Bibliographic Details
Main Author: Low, Joshua Yung Lih
Other Authors: Jong Ching Chuen
Format: Theses and Dissertations
Language:English
Published: 2014
Subjects:
Online Access:https://hdl.handle.net/10356/59971
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Institution: Nanyang Technological University
Language: English
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