Efficient architectures for computation of binary logarithm
Logarithmic Number System (LNS) is often used in digital signal processing to simplify complex arithmetic operations. LNS requires data to be converted into the logarithmic domain, i.e., logarithmic conversion. The thesis studies the VLSI architectures for logarithmic conversion. The existing Mitche...
Saved in:
Main Author: | |
---|---|
Other Authors: | |
Format: | Theses and Dissertations |
Language: | English |
Published: |
2014
|
Subjects: | |
Online Access: | https://hdl.handle.net/10356/59971 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | Nanyang Technological University |
Language: | English |
Be the first to leave a comment!