High PSRR linear low dropout regulator (LDO)
In many on-chip systems, low dropout regulators (LDO) are used to provide a clean power supply to various blocks, while taking in noisy supply from more efficient DC-DC converters. Sensitive analog blocks such as analog-to-digital converters (ADCs) require a very clean supply voltage to perform opt...
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| Format: | Final Year Project |
| Language: | English |
| Published: |
2014
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| Subjects: | |
| Online Access: | http://hdl.handle.net/10356/60121 |
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| Institution: | Nanyang Technological University |
| Language: | English |
| Summary: | In many on-chip systems, low dropout regulators (LDO) are used to provide a clean power supply to various blocks, while taking in noisy supply from more efficient DC-DC converters. Sensitive analog blocks such as analog-to-digital converters (ADCs) require a very clean supply voltage to perform optimally, making it imperative that the LDOs supplying these sensitive blocks have a very good power supply ripple rejection (PSRR). This work introduces a method to reduce supply ripple at the output of the LDO, all while working within the constraints of low power and no external output capacitor. |
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