High PSRR linear low dropout regulator (LDO)

High PSRR linear low dropout regulator (LDO)

In many on-chip systems, low dropout regulators (LDO) are used to provide a clean power supply to various blocks, while taking in noisy supply from more efficient DC-DC converters. Sensitive analog blocks such as analog-to-digital converters (ADCs) require a very clean supply voltage to perform opt...

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Main Author: Tan, Jing Yuan
Other Authors: Siek Liter
Format: Final Year Project
Language:English
Published: 2014
Subjects:
DRNTU::Engineering
Online Access:http://hdl.handle.net/10356/60121
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Institution: Nanyang Technological University
Language: English
id sg-ntu-dr.10356-60121
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spelling sg-ntu-dr.10356-601212023-07-07T16:40:53Z High PSRR linear low dropout regulator (LDO) Tan, Jing Yuan Siek Liter School of Electrical and Electronic Engineering DRNTU::Engineering In many on-chip systems, low dropout regulators (LDO) are used to provide a clean power supply to various blocks, while taking in noisy supply from more efficient DC-DC converters. Sensitive analog blocks such as analog-to-digital converters (ADCs) require a very clean supply voltage to perform optimally, making it imperative that the LDOs supplying these sensitive blocks have a very good power supply ripple rejection (PSRR). This work introduces a method to reduce supply ripple at the output of the LDO, all while working within the constraints of low power and no external output capacitor. Bachelor of Engineering 2014-05-22T06:13:03Z 2014-05-22T06:13:03Z 2014 2014 Final Year Project (FYP) http://hdl.handle.net/10356/60121 en Nanyang Technological University 80 p. application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic DRNTU::Engineering
spellingShingle DRNTU::Engineering
Tan, Jing Yuan
High PSRR linear low dropout regulator (LDO)
description In many on-chip systems, low dropout regulators (LDO) are used to provide a clean power supply to various blocks, while taking in noisy supply from more efficient DC-DC converters. Sensitive analog blocks such as analog-to-digital converters (ADCs) require a very clean supply voltage to perform optimally, making it imperative that the LDOs supplying these sensitive blocks have a very good power supply ripple rejection (PSRR). This work introduces a method to reduce supply ripple at the output of the LDO, all while working within the constraints of low power and no external output capacitor.
author2 Siek Liter
author_facet Siek Liter
Tan, Jing Yuan
format Final Year Project
author Tan, Jing Yuan
author_sort Tan, Jing Yuan
title High PSRR linear low dropout regulator (LDO)
title_short High PSRR linear low dropout regulator (LDO)
title_full High PSRR linear low dropout regulator (LDO)
title_fullStr High PSRR linear low dropout regulator (LDO)
title_full_unstemmed High PSRR linear low dropout regulator (LDO)
title_sort high psrr linear low dropout regulator (ldo)
publishDate 2014
url http://hdl.handle.net/10356/60121
_version_ 1772827816612593664

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