Ultra low quiescent current slew rate enhanced OCL-LDO

• Main Author: Chua, Jocelyn Shin Hun
• Other Authors: Siek Liter
• Format: Final Year Project
• Language: English
• Published: 2014
• Subjects: DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
• Online Access: http://hdl.handle.net/10356/60414
• Institution: Nanyang Technological University

A high slew-rate amplifier is proposed in the Ultra-Low Quiescent Current Slew-Rate Enhanced OCL-LDO regulator design with improved transient response, using push-pull output to enhance driving capability that only requires ultra-low quiescent current (IQ ~1μA ). Using the tail-current in conventional amplifier design eliminates the trade-off between small IQ and high slew-rate. Minimum power loss of OCL-LDO regulator without transient-response degradation is implemented by small dropout voltage VDO with large-size pass transistor and ultra-low IQ. With the proposed design, stability of OCL-LDO regulators has gradually improved without using any on-chip and off-chip compensation capacitors. This is beneficial to technologies which require high-area efficiency.