Ultra-low-voltage adder circuit design for smart sensor nodes in electrical vehicle applications
Arithmetic addition is a major and fundamental operation in digital signal processing DSP algorithms. Adders are one of the key computing components in DSP core and accelerator designs [ 1]. Thus, arithmetic adder is the key circuit components contributing major computation energy and creat...
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Format: | Theses and Dissertations |
Language: | English |
Published: |
2015
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Online Access: | http://hdl.handle.net/10356/65149 |
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Institution: | Nanyang Technological University |
Language: | English |
Summary: | Arithmetic addition is a major and fundamental operation in digital signal processing
DSP algorithms. Adders are one of the key computing components in DSP core and
accelerator designs [ 1]. Thus, arithmetic adder is the key circuit components
contributing major computation energy and creating a bottleneck in circuit
performance in vehicle sensor node systems. It is therefore essential to design a good
adder circuit to improve the overall performance of sensor node systems.
In order to design an adder, different adder algorithms are considered so as to
determine the suitable adder algorithm. Algorithms such as Radix-2 Kogge-Stone
Adder, Radix-4 Kogge-Stone Adder and Brunt-Kung Adder are discussed and
compared. The conclusion drawn from the comparison is that the Radix-2
Kogge-Stone Adder is an ideal addition algorithm to calculate large bits addition.
After choosing the adder algorithm, the next issue is transistor-level schematic
implementation. The whole adder algorithm can be constructed with logic gates.
With the implementation of each logic gate in adder algorithm, the transistor-level
schematic for the whole adder structure can be built through simulation.
The simulation results were derived from Mentor Graphics Modelsim simulation and
Cadence Virtuoso simulation. Mentor Graphics Modelsim simulation is to testify the
logic feasibility of the adder algorithm while Cadence Virtuoso simulation is used to
test the time delay of the adder circuit as to calculate the power consumption of the
adder designed.
When the adder is designed and simulated, the adder is needed to taken into electrical
vehicle application. First, an algorithm called Sum of Absolute Difference which is
used to calculate the vehicle speed is proposed. The sensor node architecture is
designed. Since arithmetic adders are the key computing components in sensor node
system, the Radix-2 Kogge-Stone Adder designed in this dissertation can be used to
improve the overall performance of the system. |
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