Design of low-power high speed error-tolerant adder and its application in digital signal processing

• 主要作者: Zhang, Weijia
• 其他作者: Yeo Kiat Seng
• 格式: Theses and Dissertations
• 語言: English
• 出版: 2009
• 主題: DRNTU::Engineering::Electrical and electronic engineering::Electronic systems::Signal processing
• 在線閱讀: https://hdl.handle.net/10356/15559
• 機構: Nanyang Technological University

As technology advances, errors/defects in integrated circuits become unavoidable. At the same time, the pursuit of low-power and high-speed circuits is always restricted by the conventional circuit design technology. In this context, several new technologies that regard the accuracy of circuit as a...