Design and optimization of DSP architectures for multi-context FPGA with dynamic reconfiguration

• Main Author: Rakesh Vijayakumara Warrier
• Other Authors: Vun Chan Hua, Nicholas
• Format: Theses and Dissertations
• Language: English
• Published: 2016
• Subjects: DRNTU::Engineering::Computer science and engineering
• Online Access: https://hdl.handle.net/10356/69398
• Institution: Nanyang Technological University

Field Programmable Gate Arrays (FPGAs) are now widely adopted as hardware accelerators due to their inherent parallel processing capability. However, the sub-optimal logic utilization and large reconfiguration latency in conventional single-context FPGAs pose constraints on their usage for applicat...