Delayered IC chip image analysis
Reverse engineering (RE) of an IC is essential for intellectual property (IP) protection and hardware security. It is a process of unpacking a manufactured IC and obtaining its original schematic or netlists in order to examine for its connections, functionality and quality. Current industrial solut...
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sg-ntu-dr.10356-746342023-07-07T16:58:38Z Delayered IC chip image analysis Hong, Xue Nong Gwee Bah Hwee School of Electrical and Electronic Engineering Temasek Laboratories @ NTU DRNTU::Engineering Reverse engineering (RE) of an IC is essential for intellectual property (IP) protection and hardware security. It is a process of unpacking a manufactured IC and obtaining its original schematic or netlists in order to examine for its connections, functionality and quality. Current industrial solutions mostly depend on human work. However, as IC complexity increases dramatically each year, a fully automatic solution for the most work-intensive part of RE process is in urgent need. The objective of this project was to develop an automatic software solution for RE. In this project, an algorithm was developed to stich IC images automatically based on their phase differences. Three different approaches for circuit extraction in IC images, including image processing, classifiers and convolutional neural networks (CNN), were explored and compared. Detailed procedures for each of the approach were also discussed and included in the report. At the end of the project, a Matlab based image stitching algorithm was developed and a python based CNN model for feature extraction was trained and tested. The model performed semantic segmentation on IC images with a precision of 99.924% and the inference only took half a second for an IC image. Bachelor of Engineering 2018-05-22T07:20:08Z 2018-05-22T07:20:08Z 2018 Final Year Project (FYP) http://hdl.handle.net/10356/74634 en Nanyang Technological University 67 p. application/pdf |
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DRNTU::Engineering Hong, Xue Nong Delayered IC chip image analysis |
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Reverse engineering (RE) of an IC is essential for intellectual property (IP) protection and hardware security. It is a process of unpacking a manufactured IC and obtaining its original schematic or netlists in order to examine for its connections, functionality and quality. Current industrial solutions mostly depend on human work. However, as IC complexity increases dramatically each year, a fully automatic solution for the most work-intensive part of RE process is in urgent need. The objective of this project was to develop an automatic software solution for RE. In this project, an algorithm was developed to stich IC images automatically based on their phase differences. Three different approaches for circuit extraction in IC images, including image processing, classifiers and convolutional neural networks (CNN), were explored and compared. Detailed procedures for each of the approach were also discussed and included in the report. At the end of the project, a Matlab based image stitching algorithm was developed and a python based CNN model for feature extraction was trained and tested. The model performed semantic segmentation on IC images with a precision of 99.924% and the inference only took half a second for an IC image. |
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Gwee Bah Hwee |
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Gwee Bah Hwee Hong, Xue Nong |
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Final Year Project |
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Hong, Xue Nong |
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Hong, Xue Nong |
title |
Delayered IC chip image analysis |
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Delayered IC chip image analysis |
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Delayered IC chip image analysis |
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Delayered IC chip image analysis |
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Delayered IC chip image analysis |
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delayered ic chip image analysis |
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2018 |
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http://hdl.handle.net/10356/74634 |
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1772826387679281152 |