Timing mismatch calibration circuit for high-speed time-interleaved ADCs

• 主要作者: Liu, Yifei
• 其他作者: Chang Joseph Sylvester
• 格式: Theses and Dissertations
• 語言: English
• 出版: 2018
• 主題: DRNTU::Engineering::Electrical and electronic engineering
• 在線閱讀: http://hdl.handle.net/10356/76014
• 機構: Nanyang Technological University

The concept of a Time-Interleaved analog-to-digital converter (TI ADC) which comprises sub-ADCs (channels) is proposed as a means of increasing the speed of analog-to-digital converters (ADCs), albeit with a power and area penalty. During the alternate sampling process, timing mismatch between th...