Analysis and architecting of hierarchical DFT flow

• Main Author: Mittal, Richa
• Other Authors: Gwee Bah Hwee
• Format: Theses and Dissertations
• Language: English
• Published: 2018
• Subjects: DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
• Online Access: http://hdl.handle.net/10356/76064
• Institution: Nanyang Technological University

Design for Test (DFT) is a critical activity in the modern System on Chip designs as the complexity of the chip is increasing. Generating test patterns for the current and upcoming devices having huge designs is again becoming a challenge which needs to be addressed. Hierarchical DFT is one such...