Educational simulator for analysing pipelined RISC architecture

This paper presents the implementation of a pipelined MIPS simulator for educational purpose. The MIPS simulator is built on top of an existing MIPS simulator ‘MARS’. MARS is a free online MIPS simulator that allow other programmers to add on new features to it through the Plug-in feature that is em...

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Bibliographic Details
Main Author:	Lim, Di Xiang
Other Authors:	Smitha Kavallur Prisharath Gopi
Format:	Final Year Project
Language:	English
Published:	2019
Subjects:	DRNTU::Engineering::Computer science and engineering
Online Access:	http://hdl.handle.net/10356/77021
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Institution:	Nanyang Technological University
Language:	English

id	sg-ntu-dr.10356-77021
record_format	dspace
spelling	sg-ntu-dr.10356-770212023-03-03T21:03:21Z Educational simulator for analysing pipelined RISC architecture Lim, Di Xiang Smitha Kavallur Prisharath Gopi School of Computer Science and Engineering DRNTU::Engineering::Computer science and engineering This paper presents the implementation of a pipelined MIPS simulator for educational purpose. The MIPS simulator is built on top of an existing MIPS simulator ‘MARS’. MARS is a free online MIPS simulator that allow other programmers to add on new features to it through the Plug-in feature that is employ by the creators. However, MARS latest version currently supports single cycle instruction execution only, therefore we will be introducing a new Plug-in that will enable MARS to execute instruction in a Pipelined manner. Features that are applicable to a Pipelined Simulator such as Data Forwarding, and Early Branch Evaluation are also be included in the implementation. Bachelor of Engineering (Computer Engineering) 2019-04-30T14:20:22Z 2019-04-30T14:20:22Z 2019 Final Year Project (FYP) http://hdl.handle.net/10356/77021 en Nanyang Technological University 67 p. application/pdf
institution	Nanyang Technological University
building	NTU Library
continent	Asia
country	Singapore Singapore
content_provider	NTU Library
collection	DR-NTU
language	English
topic	DRNTU::Engineering::Computer science and engineering
spellingShingle	DRNTU::Engineering::Computer science and engineering Lim, Di Xiang Educational simulator for analysing pipelined RISC architecture
description	This paper presents the implementation of a pipelined MIPS simulator for educational purpose. The MIPS simulator is built on top of an existing MIPS simulator ‘MARS’. MARS is a free online MIPS simulator that allow other programmers to add on new features to it through the Plug-in feature that is employ by the creators. However, MARS latest version currently supports single cycle instruction execution only, therefore we will be introducing a new Plug-in that will enable MARS to execute instruction in a Pipelined manner. Features that are applicable to a Pipelined Simulator such as Data Forwarding, and Early Branch Evaluation are also be included in the implementation.
author2	Smitha Kavallur Prisharath Gopi
author_facet	Smitha Kavallur Prisharath Gopi Lim, Di Xiang
format	Final Year Project
author	Lim, Di Xiang
author_sort	Lim, Di Xiang
title	Educational simulator for analysing pipelined RISC architecture
title_short	Educational simulator for analysing pipelined RISC architecture
title_full	Educational simulator for analysing pipelined RISC architecture
title_fullStr	Educational simulator for analysing pipelined RISC architecture
title_full_unstemmed	Educational simulator for analysing pipelined RISC architecture
title_sort	educational simulator for analysing pipelined risc architecture
publishDate	2019
url	http://hdl.handle.net/10356/77021
_version_	1759857833066627072

Educational simulator for analysing pipelined RISC architecture

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