Design automation for characterizing low soft-error-rate library cells

• Main Author: Wu, Liuhao
• Other Authors: Chang Joseph Sylvester
• Format: Final Year Project
• Language: English
• Published: 2019
• Subjects: DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
• Online Access: http://hdl.handle.net/10356/77336
• Institution: Nanyang Technological University

To cope with the harsh environment of space as in the satellite applications, the electronic devices must be devised to be radiation-hardened to mitigate varying degrees of radiation effects. One of the figure-of-state methods to resist the radiation from outer space is to utilise the asynchronous designing style. Without a common clock signal governing millions of circuital components as the conventional synchronous designs do, the asynchronous circuit can minimise the chance of being affected by distorted clock signals caused by EMI. In this final year project, I am expected to learn and deploy the CLICK asynchronous element, an asynchronous designing style (Ad Peeters, 2010) to develop a pipeline structure, which has the potential of scalability and lower soft-error-rate comparing to the conventional synchronous approach. I had built an asynchronous pipeline structure template exploiting the CLICK technology, furthermore, a design for demonstration is built to illustrate the feasibility of such template.