Design & analysis of dual mode logic circuits
Dual mode logic (DML) with both static and dynamic modes is able to solve severe delay of CMOS in low voltage supply. The dissertation explores different types of DML structures and related cascading strategy by multiple times of simulation and analysis. What’s more, how to apply DML design into opt...
Saved in:
Main Author: | |
---|---|
Other Authors: | |
Format: | Theses and Dissertations |
Language: | English |
Published: |
2019
|
Subjects: | |
Online Access: | http://hdl.handle.net/10356/78229 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | Nanyang Technological University |
Language: | English |
id |
sg-ntu-dr.10356-78229 |
---|---|
record_format |
dspace |
spelling |
sg-ntu-dr.10356-782292023-07-04T16:20:47Z Design & analysis of dual mode logic circuits Chen, Yun Lau Kim Teen School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits Dual mode logic (DML) with both static and dynamic modes is able to solve severe delay of CMOS in low voltage supply. The dissertation explores different types of DML structures and related cascading strategy by multiple times of simulation and analysis. What’s more, how to apply DML design into optimization of large-scale circuits is also explored, with a carry skip adder (CSA) as the test subject. Master of Science (Electronics) 2019-06-13T08:02:03Z 2019-06-13T08:02:03Z 2019 Thesis http://hdl.handle.net/10356/78229 en 92 p. application/pdf |
institution |
Nanyang Technological University |
building |
NTU Library |
continent |
Asia |
country |
Singapore Singapore |
content_provider |
NTU Library |
collection |
DR-NTU |
language |
English |
topic |
DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits |
spellingShingle |
DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits Chen, Yun Design & analysis of dual mode logic circuits |
description |
Dual mode logic (DML) with both static and dynamic modes is able to solve severe delay of CMOS in low voltage supply. The dissertation explores different types of DML structures and related cascading strategy by multiple times of simulation and analysis. What’s more, how to apply DML design into optimization of large-scale circuits is also explored, with a carry skip adder (CSA) as the test subject. |
author2 |
Lau Kim Teen |
author_facet |
Lau Kim Teen Chen, Yun |
format |
Theses and Dissertations |
author |
Chen, Yun |
author_sort |
Chen, Yun |
title |
Design & analysis of dual mode logic circuits |
title_short |
Design & analysis of dual mode logic circuits |
title_full |
Design & analysis of dual mode logic circuits |
title_fullStr |
Design & analysis of dual mode logic circuits |
title_full_unstemmed |
Design & analysis of dual mode logic circuits |
title_sort |
design & analysis of dual mode logic circuits |
publishDate |
2019 |
url |
http://hdl.handle.net/10356/78229 |
_version_ |
1772826310805028864 |