VLSI implementation of montgomery modular multiplier
Among data encryption technologies, RSA (Rivest, Shamir and Adleman) is the most secure and mature cryptosystem in the industry. RSA can not only encrypt and decrypt data, but also meet the requirements of digital signature authentication and identification. RSA is the representative of public ke...
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| 主要作者: | |
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| 其他作者: | |
| 格式: | Theses and Dissertations |
| 語言: | English |
| 出版: |
2019
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| 主題: | |
| 在線閱讀: | http://hdl.handle.net/10356/78466 |
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| 機構: | Nanyang Technological University |
| 語言: | English |
| 總結: | Among data encryption technologies, RSA (Rivest, Shamir and Adleman) is the most secure
and mature cryptosystem in the industry. RSA can not only encrypt and decrypt data, but also
meet the requirements of digital signature authentication and identification. RSA is the
representative of public key cryptography. As computer processing power increases, the
security of RSA is increasingly dependent on more complex mathematical operations.
Therefore, the use of software technology to achieve data encryption cannot meet the speed
and security requirements of information security. While in the hardware approach of the RSA,
the Montgomery modular multiplication is the core component. This dissertation first analyzes
and studies various Montgomery algorithms, then a pipelined architecture multiplier based on
radix-2 Montgomery algorithm is designed. The design and simulation are based on Cadence
Virtuoso software using TSMC’s 40nm technology. |
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