A hybrid short read mapping accelerator

Background The rapid growth of short read datasets poses a new challenge to the short read mapping problem in terms of sensitivity and execution speed. Existing methods often use a restrictive error model for computing the alignments to improve speed, whereas more flexible error models are generall...

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Main Authors: Chen, Yupeng, Schmidt, Bertil, Maskell, Douglas Leslie
Other Authors: School of Computer Engineering
Format: Article
Language:English
Published: 2013
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Online Access:https://hdl.handle.net/10356/79483
http://hdl.handle.net/10220/10983
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Institution: Nanyang Technological University
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spelling sg-ntu-dr.10356-794832022-02-16T16:30:37Z A hybrid short read mapping accelerator Chen, Yupeng Schmidt, Bertil Maskell, Douglas Leslie School of Computer Engineering DRNTU::Engineering::Computer science and engineering Background The rapid growth of short read datasets poses a new challenge to the short read mapping problem in terms of sensitivity and execution speed. Existing methods often use a restrictive error model for computing the alignments to improve speed, whereas more flexible error models are generally too slow for large-scale applications. A number of short read mapping software tools have been proposed. However, designs based on hardware are relatively rare. Field programmable gate arrays (FPGAs) have been successfully used in a number of specific application areas, such as the DSP and communications domains due to their outstanding parallel data processing capabilities, making them a competitive platform to solve problems that are “inherently parallel”. Results We present a hybrid system for short read mapping utilizing both FPGA-based hardware and CPU-based software. The computation intensive alignment and the seed generation operations are mapped onto an FPGA. We present a computationally efficient, parallel block-wise alignment structure (Align Core) to approximate the conventional dynamic programming algorithm. The performance is compared to the multi-threaded CPU-based GASSST and BWA software implementations. For single-end alignment, our hybrid system achieves faster processing speed than GASSST (with a similar sensitivity) and BWA (with a higher sensitivity); for pair-end alignment, our design achieves a slightly worse sensitivity than that of BWA but has a higher processing speed. Conclusions This paper shows that our hybrid system can effectively accelerate the mapping of short reads to a reference genome based on the seed-and-extend approach. The performance comparison to the GASSST and BWA software implementations under different conditions shows that our hybrid design achieves a high degree of sensitivity and requires less overall execution time with only modest FPGA resource utilization. Our hybrid system design also shows that the performance bottleneck for the short read mapping problem can be changed from the alignment stage to the seed generation stage, which provides an additional requirement for the future development of short read aligners. Published version 2013-07-05T03:23:14Z 2019-12-06T13:26:26Z 2013-07-05T03:23:14Z 2019-12-06T13:26:26Z 2013 2013 Journal Article Chen, Y., Schmidt, B., & Makell, D. L. (2013). A hybrid short read mapping accelerator. BMC Bioinformatics, 14. 1471-2105 https://hdl.handle.net/10356/79483 http://hdl.handle.net/10220/10983 10.1186/1471-2105-14-67 23441908 en BMC bioinformatics © 2013 The Authors. This paper was published in BMC Bioinformatics and is made available as an electronic reprint (preprint) with permission of the Authors. The paper can be found at the following official DOI: [http://dx.doi.org/10.1186/1471-2105-14-67]. One print or electronic copy may be made for personal use only. Systematic or multiple reproduction, distribution to multiple locations via electronic or other means, duplication of any material in this paper for a fee or for commercial purposes, or modification of the content of the paper is prohibited and is subject to penalties under law. application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic DRNTU::Engineering::Computer science and engineering
spellingShingle DRNTU::Engineering::Computer science and engineering
Chen, Yupeng
Schmidt, Bertil
Maskell, Douglas Leslie
A hybrid short read mapping accelerator
description Background The rapid growth of short read datasets poses a new challenge to the short read mapping problem in terms of sensitivity and execution speed. Existing methods often use a restrictive error model for computing the alignments to improve speed, whereas more flexible error models are generally too slow for large-scale applications. A number of short read mapping software tools have been proposed. However, designs based on hardware are relatively rare. Field programmable gate arrays (FPGAs) have been successfully used in a number of specific application areas, such as the DSP and communications domains due to their outstanding parallel data processing capabilities, making them a competitive platform to solve problems that are “inherently parallel”. Results We present a hybrid system for short read mapping utilizing both FPGA-based hardware and CPU-based software. The computation intensive alignment and the seed generation operations are mapped onto an FPGA. We present a computationally efficient, parallel block-wise alignment structure (Align Core) to approximate the conventional dynamic programming algorithm. The performance is compared to the multi-threaded CPU-based GASSST and BWA software implementations. For single-end alignment, our hybrid system achieves faster processing speed than GASSST (with a similar sensitivity) and BWA (with a higher sensitivity); for pair-end alignment, our design achieves a slightly worse sensitivity than that of BWA but has a higher processing speed. Conclusions This paper shows that our hybrid system can effectively accelerate the mapping of short reads to a reference genome based on the seed-and-extend approach. The performance comparison to the GASSST and BWA software implementations under different conditions shows that our hybrid design achieves a high degree of sensitivity and requires less overall execution time with only modest FPGA resource utilization. Our hybrid system design also shows that the performance bottleneck for the short read mapping problem can be changed from the alignment stage to the seed generation stage, which provides an additional requirement for the future development of short read aligners.
author2 School of Computer Engineering
author_facet School of Computer Engineering
Chen, Yupeng
Schmidt, Bertil
Maskell, Douglas Leslie
format Article
author Chen, Yupeng
Schmidt, Bertil
Maskell, Douglas Leslie
author_sort Chen, Yupeng
title A hybrid short read mapping accelerator
title_short A hybrid short read mapping accelerator
title_full A hybrid short read mapping accelerator
title_fullStr A hybrid short read mapping accelerator
title_full_unstemmed A hybrid short read mapping accelerator
title_sort hybrid short read mapping accelerator
publishDate 2013
url https://hdl.handle.net/10356/79483
http://hdl.handle.net/10220/10983
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