Fast analysis of a large-scale inductive interconnect by block-structure-preserved macromodeling

To efficiently analyze the large-scale interconnect dominant circuits with inductive couplings (mutual inductances), this paper introduces a new state matrix, called VNA, to stamp inverse-inductance elements by replacing inductive-branch current with flux. The state matrix under VNA is diagonal-domi...

Full description

Saved in:
Bibliographic Details
Main Authors: Tan, Sheldon X. D., Yu, Hao, Chu, Chunta Lei He, Shi, Yiyu, Smart, David, He, Lei
Other Authors: School of Electrical and Electronic Engineering
Format: Article
Language:English
Published: 2012
Online Access:https://hdl.handle.net/10356/79637
http://hdl.handle.net/10220/8562
Tags: Add Tag
No Tags, Be the first to tag this record!
Institution: Nanyang Technological University
Language: English
id sg-ntu-dr.10356-79637
record_format dspace
spelling sg-ntu-dr.10356-796372020-03-07T13:57:23Z Fast analysis of a large-scale inductive interconnect by block-structure-preserved macromodeling Tan, Sheldon X. D. Yu, Hao Chu, Chunta Lei He Shi, Yiyu Smart, David He, Lei School of Electrical and Electronic Engineering To efficiently analyze the large-scale interconnect dominant circuits with inductive couplings (mutual inductances), this paper introduces a new state matrix, called VNA, to stamp inverse-inductance elements by replacing inductive-branch current with flux. The state matrix under VNA is diagonal-dominant, sparse, and passive. To further explore the sparsity and hierarchy at the block level, a new matrix-stretching method is introduced to reorder coupled fluxes into a decoupled state matrix with a bordered block diagonal (BBD) structure. A corresponding block-structure-preserved model-order reduction, called BVOR, is developed to preserve the sparsity and hierarchy of the BBD matrix at the block level. This enables us to efficiently build and simulate the macromodel within a SPICE-like circuit simulator. Experiments show that our method achieves up to 7× faster modeling building time, up to 33× faster simulation time, and as much as 67× smaller waveform error compared to SAPOR [a second-order reduction based on nodal analysis (NA)] and PACT (a first-order 2×2 structured reduction based on modified NA). 2012-09-18T08:03:55Z 2019-12-06T13:29:52Z 2012-09-18T08:03:55Z 2019-12-06T13:29:52Z 2009 2009 Journal Article Yu, H., Chu, C. L. H., Shi, Y., Smart, D., He, L., & Tan, S. X. D. (2009). Fast analysis of a large-scale inductive interconnect by block-structure-preserved macromodeling. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 18(10), 1399-1411. 1063-8210 https://hdl.handle.net/10356/79637 http://hdl.handle.net/10220/8562 10.1109/TVLSI.2009.2024343 151733 en IEEE transactions on very large scale integration (VLSI) systems © 2009 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: [http://dx.doi.org/10.1109/TVLSI.2009.2024343]. application/pdf
institution Nanyang Technological University
building NTU Library
country Singapore
collection DR-NTU
language English
description To efficiently analyze the large-scale interconnect dominant circuits with inductive couplings (mutual inductances), this paper introduces a new state matrix, called VNA, to stamp inverse-inductance elements by replacing inductive-branch current with flux. The state matrix under VNA is diagonal-dominant, sparse, and passive. To further explore the sparsity and hierarchy at the block level, a new matrix-stretching method is introduced to reorder coupled fluxes into a decoupled state matrix with a bordered block diagonal (BBD) structure. A corresponding block-structure-preserved model-order reduction, called BVOR, is developed to preserve the sparsity and hierarchy of the BBD matrix at the block level. This enables us to efficiently build and simulate the macromodel within a SPICE-like circuit simulator. Experiments show that our method achieves up to 7× faster modeling building time, up to 33× faster simulation time, and as much as 67× smaller waveform error compared to SAPOR [a second-order reduction based on nodal analysis (NA)] and PACT (a first-order 2×2 structured reduction based on modified NA).
author2 School of Electrical and Electronic Engineering
author_facet School of Electrical and Electronic Engineering
Tan, Sheldon X. D.
Yu, Hao
Chu, Chunta Lei He
Shi, Yiyu
Smart, David
He, Lei
format Article
author Tan, Sheldon X. D.
Yu, Hao
Chu, Chunta Lei He
Shi, Yiyu
Smart, David
He, Lei
spellingShingle Tan, Sheldon X. D.
Yu, Hao
Chu, Chunta Lei He
Shi, Yiyu
Smart, David
He, Lei
Fast analysis of a large-scale inductive interconnect by block-structure-preserved macromodeling
author_sort Tan, Sheldon X. D.
title Fast analysis of a large-scale inductive interconnect by block-structure-preserved macromodeling
title_short Fast analysis of a large-scale inductive interconnect by block-structure-preserved macromodeling
title_full Fast analysis of a large-scale inductive interconnect by block-structure-preserved macromodeling
title_fullStr Fast analysis of a large-scale inductive interconnect by block-structure-preserved macromodeling
title_full_unstemmed Fast analysis of a large-scale inductive interconnect by block-structure-preserved macromodeling
title_sort fast analysis of a large-scale inductive interconnect by block-structure-preserved macromodeling
publishDate 2012
url https://hdl.handle.net/10356/79637
http://hdl.handle.net/10220/8562
_version_ 1681048654700347392