A low voltage low power highly linear CMOS quadrature mixer using transconductance cancellation technique
This paper presents a low voltage low power high linearity quadrature mixer for software defined radio applications in a 90nm CMOS technology. A 7-dB improvement of input-referred 3rd-order intermodulation point (IIP3) is achieved by using a differential gm″ (the second derivation of transconductanc...
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| Main Authors: | , , , , , |
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| 其他作者: | |
| 格式: | Conference or Workshop Item |
| 語言: | English |
| 出版: |
2012
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| 主題: | |
| 在線閱讀: | https://hdl.handle.net/10356/79646 http://hdl.handle.net/10220/8417 |
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| 總結: | This paper presents a low voltage low power high linearity quadrature mixer for software defined radio applications in a 90nm CMOS technology. A 7-dB improvement of input-referred 3rd-order intermodulation point (IIP3) is achieved by using a differential gm″ (the second derivation of transconductance) canceling technology. The negative value of gm″ in saturated pseudo differential transistor (PDT) is compensated by the positive value of PDT in subthreshold region. The even-order distortion is eliminated by differential PDTs. The mixer consumes a dc power of only 3.8mW under 1V supply. The conversion gain with 10 samples is 3.6∼7.2 dB in the frequency range of 0.3∼6 GHz. the IIP3 is 7.9∼12.3 dBm 0.3∼6 GHz, whereas the single-sideband noise figure (SSB NF) is 11.1∼14.7 dB. |
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